Think of the digital receiver as a hardware preprocessor for DSP. It preselects only the signals you are interested in and removes all others. This provides an optimum bandwidth and minimum sampling rate into the DSP. Since the number of DSPs required in a system is directly proportional to the sampling rate of input data, by reducing the sampling rate you can dramatically reduce the cost and complexity of the DSP system that follows.
Even if the digital receiver outputs do not require a great deal of signal processing, reduction of bandwidth and sampling rate helps save time in data transfers to another subsystem, helps minimize recording time and tape or disk space, and speeds up communication channels.
Digital Receiver Chip Performance The chart in Figure 20 shows the salient characteristics for seven popular digital receiver chips and three FPGA IP cores. Note that the range of decimation settings for the narrowband chips on the left is much higher than for the wideband receivers on the right. The output sampling frequencies for real and complex outputs are shown as a function of the decimation factor N.
Notice also that the 3 dB output bandwidth of the FIR filter is expressed as a percentage of the input sampling rate divided by N. This percentage reflects the frequency characteristics of the specific FIR filter function implemented in the digital receiver chip. Each filter characteristic has its own passband flatness, rolloff rate, and stop band attenuation characteristics suitable for different applications.
As an example, if we were using the TI/GC1011A with a 64 MHz A/D converter and needed a usable output bandwidth of 10 kHz, we could solve for the appropriate decimation factor setting as follows:
10 kHz = 0.80 x 's / N or
N = 0.80 x 64 MHz / 10 kHz = 5120
Note that the decimation factors of narrowband receivers are programmable in steps of 1 or 4 and the wideband receivers are programmable in binary steps as shown. Some receivers allow entry of custom FIR filter coefficients and others have output resampling stages to support custom filter characteristics and output sampling rates.
The fourth article in this series will take a closer look at digital receiver applications.
About the author
Rodger H. Hosking is Vice President of Pentek and was one of the co-founders of the company in 1986. With over 26 years experience in the electronics industry, he is responsible for matching new technology to advanced signal processing applications and for the definition of new products. He designed the first commercial direct digital frequency synthesizer, and holds patents in frequency synthesis and FFT spectrum analysis techniques. Rodger has a BS degree in Physics from Allegheny College and both BS and MS degrees in Electrical Engineering from Columbia University. He can be reached at [email protected].
